RUS
Description
Compliant to USB specification Revision 2.0
Support 4/3/2 downstream ports by I/O pin configuration
Upstream port supports both high-speed(HS) and full-speed(FS) traffic
Downstream ports supports HS, FS, and low-speed(LS) traffic
On-chip 8-bit micro-processor
RISC-like architecture
USB optimized instruction set
Single Transaction Translator(STT)
Single TT shares the same TT control logics for all downstream port device, This is the most cost effective solution for TT. Multiple TT provides individual TT control logics for each downstream port.
This is a performance better choice for USB 2.0 hub
Integrate USB 2.0 transceiver
Each downstream port supports two-color status indicator, with automatic and manual modes comliant to USB specification Revision 2.0
Embed serial resister for USB signals
Support both individual and gang modes of power management and over-current detection for downstream ports
Conform to bus power requirement
Automatic switching between self-powered and bus-powered modes
Support compound-device(non-removable in downstream ports) by I/O pin configuration
Configurable non-removable device support
Embeds 5V to 3.3V regulator
Improve output drivers with slew-rate control for EMI reduction
Internal power-fail detection for ESD recovery
Applications: